forked from minetest-mods/mesecons
465 lines
13 KiB
Lua
465 lines
13 KiB
Lua
local S = minetest.get_translator(minetest.get_current_modname())
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local plg = {}
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plg.rules = {}
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-- per-player formspec positions
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plg.open_formspecs = {}
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local lcore = dofile(minetest.get_modpath(minetest.get_current_modname()) .. "/logic.lua")
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dofile(minetest.get_modpath(minetest.get_current_modname()) .. "/tool.lua")(plg)
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plg.register_nodes = function(template)
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-- each loop is for one of the 4 IO ports
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for a = 0, 1 do
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for b = 0, 1 do
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for c = 0, 1 do
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for d = 0, 1 do
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local ndef = table.copy(template)
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local nodename = "mesecons_fpga:fpga"
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.. tostring(d) .. tostring(c) .. tostring(b) .. tostring(a)
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-- build top texture string
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local texture = "jeija_fpga_top.png"
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if a == 1 then texture = texture .. "^jeija_microcontroller_LED_A.png" end
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if b == 1 then texture = texture .. "^jeija_microcontroller_LED_B.png" end
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if c == 1 then texture = texture .. "^jeija_microcontroller_LED_C.png" end
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if d == 1 then texture = texture .. "^jeija_microcontroller_LED_D.png" end
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ndef.tiles[1] = texture
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ndef.inventory_image = texture
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if (a + b + c + d) > 0 then
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ndef.groups["not_in_creative_inventory"] = 1
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end
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-- interaction with mesecons (input / output)
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local rules_out = {}
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if a == 1 then table.insert(rules_out, {x = -1, y = 0, z = 0}) end
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if b == 1 then table.insert(rules_out, {x = 0, y = 0, z = 1}) end
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if c == 1 then table.insert(rules_out, {x = 1, y = 0, z = 0}) end
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if d == 1 then table.insert(rules_out, {x = 0, y = 0, z = -1}) end
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plg.rules[nodename] = rules_out
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local rules_in = {}
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if a == 0 then table.insert(rules_in, {x = -1, y = 0, z = 0}) end
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if b == 0 then table.insert(rules_in, {x = 0, y = 0, z = 1}) end
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if c == 0 then table.insert(rules_in, {x = 1, y = 0, z = 0}) end
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if d == 0 then table.insert(rules_in, {x = 0, y = 0, z = -1}) end
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ndef.mesecons.effector.rules = rules_in
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if (a + b + c + d) > 0 then
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ndef.mesecons.receptor = {
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state = mesecon.state.on,
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rules = rules_out,
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}
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end
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minetest.register_node(nodename, ndef)
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end
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end
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end
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end
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end
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plg.register_nodes({
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description = S("FPGA"),
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drawtype = "nodebox",
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tiles = {
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"", -- replaced later
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"jeija_microcontroller_bottom.png",
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"jeija_fpga_sides.png",
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"jeija_fpga_sides.png",
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"jeija_fpga_sides.png",
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"jeija_fpga_sides.png"
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},
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inventory_image = "", -- replaced later
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is_ground_content = false,
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sunlight_propagates = true,
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paramtype = "light",
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walkable = true,
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groups = {dig_immediate = 2, mesecon = 3, overheat = 1},
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drop = "mesecons_fpga:fpga0000",
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selection_box = {
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type = "fixed",
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fixed = { -8/16, -8/16, -8/16, 8/16, -5/16, 8/16 },
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},
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node_box = {
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type = "fixed",
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fixed = {
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{ -8/16, -8/16, -8/16, 8/16, -7/16, 8/16 }, -- bottom slab
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{ -5/16, -7/16, -5/16, 5/16, -6/16, 5/16 }, -- circuit board
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{ -3/16, -6/16, -3/16, 3/16, -5/16, 3/16 }, -- IC
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}
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},
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on_construct = function(pos)
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local meta = minetest.get_meta(pos)
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local is = { {}, {}, {}, {}, {}, {}, {}, {}, {}, {}, {}, {}, {}, {} }
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meta:set_string("instr", lcore.serialize(is))
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meta:set_int("valid", 0)
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meta:set_string("infotext", "FPGA")
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end,
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on_rightclick = function(pos, _, clicker)
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if not minetest.is_player(clicker) then
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return
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end
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local meta = minetest.get_meta(pos)
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local name = clicker:get_player_name()
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-- Erase formspecs of old FPGAs
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meta:set_string("formspec", "")
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plg.open_formspecs[name] = pos
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local is = lcore.deserialize(meta:get_string("instr"))
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minetest.show_formspec(name, "mesecons:fpga", plg.to_formspec_string(is, nil))
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end,
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sounds = mesecon.node_sound.stone,
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mesecons = {
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effector = {
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rules = {}, -- replaced later
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action_change = function(pos, _, rule, newstate)
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if plg.ports_changed(pos, rule, newstate) then
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plg.update(pos)
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end
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end
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}
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},
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after_dig_node = function(pos, node)
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mesecon.receptor_off(pos, plg.rules[node.name])
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for name, open_pos in pairs(plg.open_formspecs) do
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if vector.equals(pos, open_pos) then
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minetest.close_formspec(name, "mesecons:fpga")
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plg.open_formspecs[name] = nil
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end
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end
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end,
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on_blast = mesecon.on_blastnode,
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on_rotate = function(pos, _, user, mode)
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local abcd1 = {"A", "B", "C", "D"}
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local abcd2 = {A = 1, B = 2, C = 3, D = 4}
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local ops = {"op1", "op2", "dst"}
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local dir = 0
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if mode == screwdriver.ROTATE_FACE then -- clock-wise
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dir = 1
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if user and user:is_player() then
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minetest.chat_send_player(user:get_player_name(),
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"FPGA ports have been rotated clockwise.")
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end
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elseif mode == screwdriver.ROTATE_AXIS then -- counter-clockwise
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dir = -1
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if user and user:is_player() then
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minetest.chat_send_player(user:get_player_name(),
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"FPGA ports have been rotated counter-clockwise.")
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end
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end
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local meta = minetest.get_meta(pos)
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local instr = lcore.deserialize(meta:get_string("instr"))
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for i = 1, #instr do
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for _, op in ipairs(ops) do
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local o = instr[i][op]
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if o and o.type == "io" then
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local num = abcd2[o.port]
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num = num + dir
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if num > 4 then num = 1
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elseif num < 1 then num = 4 end
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instr[i][op].port = abcd1[num]
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end
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end
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end
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meta:set_string("instr", lcore.serialize(instr))
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plg.update_meta(pos, instr)
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return true
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end,
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})
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plg.to_formspec_string = function(is, err)
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local function dropdown_op(x, y, name, val)
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local s = "dropdown[" .. tostring(x) .. "," .. tostring(y) .. ";"
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.. "0.75,0.5;" .. name .. ";" -- the height seems to be ignored?
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s = s .. " ,A,B,C,D,0,1,2,3,4,5,6,7,8,9;"
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if val == nil then
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s = s .. "0" -- actually selects no field at all
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elseif val.type == "io" then
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local mapping = {
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["A"] = 1,
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["B"] = 2,
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["C"] = 3,
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["D"] = 4,
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}
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s = s .. tostring(1 + mapping[val.port])
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else -- "reg"
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s = s .. tostring(6 + val.n)
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end
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return s .. "]"
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end
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local function dropdown_action(x, y, name, val)
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local selected = 0
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local titles = { " " }
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for i, data in ipairs(lcore.get_operations()) do
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titles[i + 1] = data.fs_name
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if val == data.gate then
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selected = i + 1
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end
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end
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return ("dropdown[%f,%f;1.125,0.5;%s;%s;%i]"):format(
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x, y, name, table.concat(titles, ","), selected)
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end
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local s = "size[9,9]"..
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"label[3.4,-0.15;FPGA gate configuration]"..
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"button[7,7.5;2,2.5;program;Program]"..
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"box[4.2,0.5;0.03,7;#ffffff]"..
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"label[0.25,0.25;op. 1]"..
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"label[1.0,0.25;gate type]"..
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"label[2.125,0.25;op. 2]"..
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"label[3.15,0.25;dest]"..
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"label[4.5,0.25;op. 1]"..
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"label[5.25,0.25;gate type]"..
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"label[6.375,0.25;op. 2]"..
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"label[7.4,0.25;dest]"
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local x = 1 - 0.75
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local y = 1 - 0.25
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for i = 1, 14 do
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local cur = is[i]
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s = s .. dropdown_op (x , y, tostring(i).."op1", cur.op1)
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s = s .. dropdown_action(x+0.75 , y, tostring(i).."act", cur.action)
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s = s .. dropdown_op (x+1.875, y, tostring(i).."op2", cur.op2)
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s = s .. "label[" .. tostring(x+2.625) .. "," .. tostring(y+0.1) .. "; ->]"
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s = s .. dropdown_op (x+2.9 , y, tostring(i).."dst", cur.dst)
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y = y + 1
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if i == 7 then
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x = 4.5
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y = 1 - 0.25
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end
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end
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if err then
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local fmsg = minetest.colorize("#ff0000", minetest.formspec_escape(err.msg))
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s = s .. plg.red_box_around(err.i) ..
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"label[0.25,8.25;The gate configuration is erroneous in the marked area:]"..
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"label[0.25,8.5;" .. fmsg .. "]"
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end
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return s
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end
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plg.from_formspec_fields = function(fields)
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local function read_op(s)
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if s == nil or s == " " then
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return nil
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elseif s == "A" or s == "B" or s == "C" or s == "D" then
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return {type = "io", port = s}
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else
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return {type = "reg", n = tonumber(s)}
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end
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end
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local function read_action(s)
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for i, data in ipairs(lcore.get_operations()) do
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if data.fs_name == s then
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return data.gate
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end
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end
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end
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local is = {}
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for i = 1, 14 do
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local cur = {}
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cur.op1 = read_op(fields[tonumber(i) .. "op1"])
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cur.action = read_action(fields[tonumber(i) .. "act"])
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cur.op2 = read_op(fields[tonumber(i) .. "op2"])
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cur.dst = read_op(fields[tonumber(i) .. "dst"])
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is[#is + 1] = cur
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end
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return is
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end
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plg.update_meta = function(pos, is)
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if type(is) == "string" then -- serialized string
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is = lcore.deserialize(is)
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end
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local meta = minetest.get_meta(pos)
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local err = lcore.validate(is)
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if err == nil then
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meta:set_int("valid", 1)
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meta:set_string("infotext", "FPGA (functional)")
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else
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meta:set_int("valid", 0)
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meta:set_string("infotext", "FPGA")
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end
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-- reset ports and run programmed logic
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plg.setports(pos, false, false, false, false)
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plg.update(pos)
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-- Refresh open formspecs
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local form = plg.to_formspec_string(is, err)
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for name, open_pos in pairs(plg.open_formspecs) do
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if vector.equals(pos, open_pos) then
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minetest.show_formspec(name, "mesecons:fpga", form)
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end
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end
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return err
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end
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plg.red_box_around = function(i)
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local x, y
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if i > 7 then
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x = 4.5
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y = 0.75 + (i - 8)
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else
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x = 0.25
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y = 0.75 + (i - 1)
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end
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return string.format("box[%f,%f;3.8,0.8;#ff0000]", x-0.1, y-0.05)
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end
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plg.update = function(pos)
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local meta = minetest.get_meta(pos)
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if meta:get_int("valid") ~= 1 then
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return
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elseif mesecon.do_overheat(pos) then
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plg.setports(pos, false, false, false, false)
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meta:set_int("valid", 0)
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meta:set_string("infotext", "FPGA (overheated)")
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return
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end
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local is = lcore.deserialize(meta:get_string("instr"))
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local A, B, C, D = plg.getports(pos)
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A, B, C, D = lcore.interpret(is, A, B, C, D)
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plg.setports(pos, A, B, C, D)
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end
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-- Updates the port states according to the signal change.
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-- Returns whether the port states actually changed.
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plg.ports_changed = function(pos, rule, newstate)
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if rule == nil then return false end
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local meta = minetest.get_meta(pos)
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local states
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local s = meta:get_string("portstates")
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if s == nil then
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states = {false, false, false, false}
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else
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states = {
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s:sub(1, 1) == "1",
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s:sub(2, 2) == "1",
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s:sub(3, 3) == "1",
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s:sub(4, 4) == "1",
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}
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end
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-- trick to transform rules (see register_node) into port number
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local portno = ({4, 1, nil, 3, 2})[3 + rule.x + 2*rule.z]
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states[portno] = (newstate == "on")
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local new_portstates =
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(states[1] and "1" or "0") .. (states[2] and "1" or "0") ..
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(states[3] and "1" or "0") .. (states[4] and "1" or "0")
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if new_portstates ~= s then
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meta:set_string("portstates", new_portstates)
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return true
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end
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return false
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end
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plg.getports = function(pos) -- gets merged states of INPUT & OUTPUT
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local sin, sout
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local s = minetest.get_meta(pos):get_string("portstates")
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if s == nil then
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sin = {false, false, false, false}
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else
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sin = {
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s:sub(1, 1) == "1",
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s:sub(2, 2) == "1",
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s:sub(3, 3) == "1",
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s:sub(4, 4) == "1",
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}
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end
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local name = minetest.get_node(pos).name
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assert(name:find("mesecons_fpga:fpga") == 1)
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local off = #"mesecons_fpga:fpga"
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sout = {
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name:sub(off+4, off+4) == "1",
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name:sub(off+3, off+3) == "1",
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name:sub(off+2, off+2) == "1",
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name:sub(off+1, off+1) == "1",
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}
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return unpack({
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sin[1] or sout[1],
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sin[2] or sout[2],
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sin[3] or sout[3],
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sin[4] or sout[4],
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})
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end
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plg.setports = function(pos, A, B, C, D) -- sets states of OUTPUT
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local base = "mesecons_fpga:fpga"
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local name = base
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.. (D and "1" or "0") .. (C and "1" or "0")
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.. (B and "1" or "0") .. (A and "1" or "0")
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minetest.swap_node(pos, {name = name, param2 = minetest.get_node(pos).param2})
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if A ~= nil then
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local ru = plg.rules[base .. "0001"]
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if A then mesecon.receptor_on(pos, ru) else mesecon.receptor_off(pos, ru) end
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end
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if B ~= nil then
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local ru = plg.rules[base .. "0010"]
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if B then mesecon.receptor_on(pos, ru) else mesecon.receptor_off(pos, ru) end
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end
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if C ~= nil then
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local ru = plg.rules[base .. "0100"]
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if C then mesecon.receptor_on(pos, ru) else mesecon.receptor_off(pos, ru) end
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end
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if D ~= nil then
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local ru = plg.rules[base .. "1000"]
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if D then mesecon.receptor_on(pos, ru) else mesecon.receptor_off(pos, ru) end
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end
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end
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minetest.register_on_player_receive_fields(function(player, formname, fields)
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local player_name = player:get_player_name()
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if formname ~= "mesecons:fpga" or fields.quit then
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plg.open_formspecs[player_name] = nil -- potential garbage
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return
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end
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if not fields.program then
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return -- we only care when the user clicks "Program"
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end
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local pos = plg.open_formspecs[player_name]
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if minetest.is_protected(pos, player_name) then
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minetest.record_protection_violation(pos, player_name)
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return
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end
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local meta = minetest.get_meta(pos)
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local is = plg.from_formspec_fields(fields)
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meta:set_string("instr", lcore.serialize(is))
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local err = plg.update_meta(pos, is)
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if not err then
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plg.open_formspecs[player_name] = nil
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-- Close on success
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minetest.close_formspec(player_name, "mesecons:fpga")
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end
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end)
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minetest.register_on_leaveplayer(function(player)
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plg.open_formspecs[player:get_player_name()] = nil
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end)
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minetest.register_craft({
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output = "mesecons_fpga:fpga0000 2",
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recipe = {
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{'group:mesecon_conductor_craftable', 'group:mesecon_conductor_craftable'},
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{'mesecons_materials:silicon', 'mesecons_materials:silicon'},
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{'group:mesecon_conductor_craftable', 'group:mesecon_conductor_craftable'},
|
|
}
|
|
})
|