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Improve FPGA port double assignment test

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This commit is contained in:
Jude Melton-Houghton 2022-04-16 15:07:34 -04:00
parent 749f7b5267
commit 4342e64e8c
1 changed files with 1 additions and 1 deletions
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mesecons_fpga/spec/logic_spec.lua
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@ -127,7 +127,7 @@ describe("FPGA logic", function()
end)
it("allows double port assignment", function()
test_program({a = true}, {b = true}, {{"=", "A", "B"}, {"=", "A", "B"}})
test_program({a = true}, {b = true}, {{"NOT", "A", "B"}, {"=", "A", "B"}})
end)
it("allows assignment to port operand", function()