mirror of
https://github.com/minetest-mods/mesecons.git
synced 2024-11-14 14:20:33 +01:00
FPGA: Remove formspec from metadata
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parent
3da5403158
commit
5d012a6f5d
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@ -1,5 +1,7 @@
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local plg = {}
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plg.rules = {}
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-- per-player formspec positions
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plg.open_formspecs = {}
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local lcore = dofile(minetest.get_modpath(minetest.get_current_modname()) .. "/logic.lua")
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@ -93,16 +95,20 @@ plg.register_nodes({
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meta:set_string("instr", lcore.serialize(is))
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meta:set_int("valid", 0)
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meta:set_string("formspec", plg.to_formspec_string(is))
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meta:set_string("infotext", "FPGA")
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end,
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on_receive_fields = function(pos, formname, fields, sender)
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if fields.program == nil then return end -- we only care when the user clicks "Program"
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on_rightclick = function(pos, node, clicker)
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if not minetest.is_player(clicker) then
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return
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end
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local meta = minetest.get_meta(pos)
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local is = plg.from_formspec_fields(fields)
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local name = clicker:get_player_name()
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-- Erase formspecs of old FPGAs
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meta:set_string("formspec", "")
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meta:set_string("instr", lcore.serialize(is))
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plg.update_formspec(pos, is)
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plg.open_formspecs[name] = pos
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local is = lcore.deserialize(meta:get_string("instr"))
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minetest.show_formspec(name, "mesecons:fpga", plg.to_formspec_string(is, nil))
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end,
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sounds = default.node_sound_stone_defaults(),
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mesecons = {
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@ -116,6 +122,12 @@ plg.register_nodes({
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},
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after_dig_node = function(pos, node)
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mesecon.receptor_off(pos, plg.rules[node.name])
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for name, open_pos in pairs(plg.open_formspecs) do
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if vector.equals(pos, open_pos) then
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minetest.close_formspec(name, "mesecons:fpga")
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plg.open_formspecs[name] = nil
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end
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end
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end,
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on_blast = mesecon.on_blastnode,
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on_rotate = function(pos, node, user, mode)
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@ -153,13 +165,12 @@ plg.register_nodes({
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end
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meta:set_string("instr", lcore.serialize(instr))
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plg.update_formspec(pos, instr)
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plg.update_meta(pos, instr)
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return true
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end,
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})
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plg.to_formspec_string = function(is)
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plg.to_formspec_string = function(is, err)
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local function dropdown_op(x, y, name, val)
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local s = "dropdown[" .. tostring(x) .. "," .. tostring(y) .. ";"
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.. "0.75,0.5;" .. name .. ";" -- the height seems to be ignored?
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@ -193,7 +204,7 @@ plg.to_formspec_string = function(is)
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end
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local s = "size[9,9]"..
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"label[3.4,-0.15;FPGA gate configuration]"..
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"button_exit[7,7.5;2,2.5;program;Program]"..
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"button[7,7.5;2,2.5;program;Program]"..
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"box[4.2,0.5;0.03,7;#ffffff]"..
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"label[0.25,0.25;op. 1]"..
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"label[1.0,0.25;gate type]"..
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@ -219,6 +230,12 @@ plg.to_formspec_string = function(is)
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y = 1 - 0.25
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end
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end
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if err then
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local fmsg = minetest.colorize("#ff0000", minetest.formspec_escape(err.msg))
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s = s .. plg.red_box_around(err.i) ..
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"label[0.25,8.25;The gate configuration is erroneous in the marked area:]"..
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"label[0.25,8.5;" .. fmsg .. "]"
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end
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return s
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end
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@ -251,12 +268,11 @@ plg.from_formspec_fields = function(fields)
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return is
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end
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plg.update_formspec = function(pos, is)
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plg.update_meta = function(pos, is)
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if type(is) == "string" then -- serialized string
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is = lcore.deserialize(is)
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end
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local meta = minetest.get_meta(pos)
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local form = plg.to_formspec_string(is)
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local err = lcore.validate(is)
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if err == nil then
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@ -265,17 +281,20 @@ plg.update_formspec = function(pos, is)
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else
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meta:set_int("valid", 0)
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meta:set_string("infotext", "FPGA")
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local fmsg = minetest.colorize("#ff0000", minetest.formspec_escape(err.msg))
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form = form .. plg.red_box_around(err.i) ..
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"label[0.25,8.25;The gate configuration is erroneous in the marked area:]"..
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"label[0.25,8.5;" .. fmsg .. "]"
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end
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meta:set_string("formspec", form)
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-- reset ports and run programmed logic
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plg.setports(pos, false, false, false, false)
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plg.update(pos)
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-- Refresh open formspecs
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local form = plg.to_formspec_string(is, err)
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for name, open_pos in pairs(plg.open_formspecs) do
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if vector.equals(pos, open_pos) then
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minetest.show_formspec(name, "mesecons:fpga", form)
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end
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end
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return err
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end
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plg.red_box_around = function(i)
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@ -394,6 +413,38 @@ plg.setports = function(pos, A, B, C, D) -- sets states of OUTPUT
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end
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end
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minetest.register_on_player_receive_fields(function(player, formname, fields)
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local player_name = player:get_player_name()
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if formname ~= "mesecons:fpga" or fields.quit then
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plg.open_formspecs[player_name] = nil -- potential garbage
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return
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end
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if not fields.program then
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return -- we only care when the user clicks "Program"
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end
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local pos = plg.open_formspecs[player_name]
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if minetest.is_protected(pos, player_name) then
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minetest.record_protection_violation(pos, player_name)
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return
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end
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local meta = minetest.get_meta(pos)
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local is = plg.from_formspec_fields(fields)
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meta:set_string("instr", lcore.serialize(is))
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local err = plg.update_meta(pos, is)
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if not err then
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plg.open_formspecs[player_name] = nil
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-- Close on success
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minetest.close_formspec(player_name, "mesecons:fpga")
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end
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end)
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minetest.register_on_leaveplayer(function(player)
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plg.open_formspecs[player:get_player_name()] = nil
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end)
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minetest.register_craft({
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output = "mesecons_fpga:fpga0000 2",
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@ -22,7 +22,7 @@ minetest.register_tool("mesecons_fpga:programmer", {
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end
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itemstack:set_metadata(meta:get_string("instr"))
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minetest.chat_send_player(placer:get_player_name(), "FPGA gate configuration was successfully copied!")
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return itemstack
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end,
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on_use = function(itemstack, user, pointed_thing)
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@ -34,17 +34,22 @@ minetest.register_tool("mesecons_fpga:programmer", {
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if minetest.get_node(pos).name:find("mesecons_fpga:fpga") ~= 1 then
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return itemstack
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end
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local player_name = user:get_player_name()
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if minetest.is_protected(pos, player_name) then
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minetest.record_protection_violation(pos, player_name)
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return itemstack
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end
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local imeta = itemstack:get_metadata()
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if imeta == "" then
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minetest.chat_send_player(user:get_player_name(), "Use shift+right-click to copy a gate configuration first.")
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minetest.chat_send_player(player_name, "Use shift+right-click to copy a gate configuration first.")
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return itemstack
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end
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local meta = minetest.get_meta(pos)
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meta:set_string("instr", imeta)
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plg.update_formspec(pos, imeta)
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minetest.chat_send_player(user:get_player_name(), "Gate configuration was successfully written to FPGA!")
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plg.update_meta(pos, imeta)
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minetest.chat_send_player(player_name, "Gate configuration was successfully written to FPGA!")
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return itemstack
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end
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